Generally, in computer systems having a peripheral device (e.g., a peripheral graphics device), the peripheral device is only allowed access to the physical memory portion of the system, not the virtual to physical memory mapping resources. Therefore, the peripheral device cannot readily access memory blocks in the computer system which are not contiguous in physical memory space. Typical peripheral devices are designed to access memory blocks, stored in a host computer system, by use of a base physical memory address. If a memory block sought to be accessed by a peripheral device is not contiguous in physical memory space, a mere base physical address of the memory block is not sufficient to access that memory block.
If a memory management system is active in a host computer system, then paging may be active in which case blocks of memory can be discontiguous in physical memory space. Paging is a storage allocation technique in which programs or data are divided into fixed length blocks called pages and main storage can be divided into blocks of the same length called page frames. A page frame is comprised of a fixed region of physical memory. Pages are stored in page frames, although not necessarily contiguously. In paging schemes, pages of data can be swapped between main and auxiliary storage if needed. Paging allows virtual memory because auxiliary storage can be addressed as though it were part of main storage. Portions of a users program and data are placed in auxiliary storage, and the operating system automatically swaps them in and out of main storage as needed. Memory management systems which feature paging also employ page tables. A page table is a memory map which provides a physical address for each logical page address. Peripheral devices generally do not have the capability of accessing memory maps, including page tables.
Memory management systems which feature paging include EMM386.EXE, DOS based protected mode extenders, and various other protected mode operating systems. The virtual memory system of the Intel 80386 microprocessor, for example, includes the presence of both paging and segmentation. Segmentation is a memory management technique that allocates main memory by segments. When a segment not currently residing in main memory is required, the entire segment is transferred from secondary memory. The physical addresses assigned to the segments are maintained in a memory map. If both segmentation and paging are used, every memory address generated by a program goes through the two-stage translation process defined in Relationship (1), below; EQU Virtual address L.fwdarw.Logical address N.fwdarw.Physical address P(1).
Without segmentation, L=N. Without paging, N=P. The segmentation and paging units both contain high-speed caches to store the active portions of the various memory maps needed for address translation. The page size used by an Intel 80386 microprocessor is 4 Kilobytes.
Typical peripheral graphics devices access memory blocks, which are contiguous in physical memory space, by use of a base physical memory address. This methodology has been sufficient in the past because peripheral graphics devices did not typically require access to memory buffers comprising more than one page because the size of blocks of graphics data did not typically exceed a page. However, state of the art computer graphics systems are now being used to process blocks of graphics data which exceed a single page in size. Therefore, a method is needed for providing a peripheral graphics device with access to a memory buffer which can exceed a single page in size. Because such a memory buffer can be discontiguous in physical memory space, a method is needed to provide the peripheral graphics device with access to the memory buffer.
Accordingly, the present invention provides a method for (1) determining whether a memory block is contiguous in physical memory space, and (2) providing a peripheral device with access to the memory block if it is not contiguous in physical memory space. These and other advantages of the present invention will become apparent within discussions of the present invention herein.